Computer systems are becoming increasingly more complex. This growing complexity increases the difficulty of analyzing and understanding the dynamic behavior of the systems. When computer systems are built with low integration components, hardware monitoring techniques are able to access and analyze signals of interest for understanding the operation and performance of the systems. But as computer systems become more complex and highly integrated, these signals of interest can become inaccessible, many times being sealed within the packages of the components.
Moreover, simulations of computer system behavior are incapable of providing a complete understanding of the performance of the system. For one, such simulations run at significantly lower speeds than actual computer system operation. Consequently, these simulations are unable to run large real applications within a useful period of time. Further, the simulations cannot aid in understanding flaws that are produced during the implementation of the design or during the manufacture of the computer system.
In order to provide a window of visibility into the behavior of computer systems, microprocessors have begun to include on-chip performance counters for counting occurrences of important events during system operation. Important events can include, for example, cache misses, instructions executed, and I/O data transfer requests. These counters can be set to interrupt the microprocessor upon a count overflow. Typically, the microprocessors can also periodically examine the performance counters, and thereby evaluate the performance of the system.
Recent implementations of on-chip performance counters supply each performance counter a distinct set of events from which only one event is selected for counting. Such implementations are limited in that each particular event can be selected by only one performance counter. Also, the selection of which events to count, typically, must be determined at the time when the computer system is designed. Unfortunately, not all computer system performance problems can be anticipated at design time, especially those problems that arise because something has been overlooked. Thus, selecting events at design time can limit performance monitoring to those events that are of no interest to the system designer in light of the actual behavior of the computer system.
Thus, it is desired that there be a method and apparatus for counting event signals that enable the system user to specify, while an application program is running, which events signals to count.